The competitive and supply chain environment for Taiwan Semiconductor Manufacturing is becoming increasingly complex, marked by Tesla's recent announcement of its TeraFab plan to build its own chip factory, coupled with liquefied natural gas supply concerns stemming from Middle East tensions and the gradual technological catch-up by Intel and Samsung.
According to analysis, JPMorgan systematically addressed the ten most pressing investor questions in a research report dated March 24th. The report covers capital expenditure trajectory, capacity planning, competitive dynamics, packaging strategy, and supply chain risks, providing a comprehensive framework for fundamental assessment.
JPMorgan maintains an Overweight rating on Taiwan Semiconductor Manufacturing with a target price of NT$2,250. The firm forecasts that the company's US dollar revenue will grow by over 30% in 2026, driven primarily by robust N3 demand, accelerated N2 capacity ramp-up, expansion in advanced packaging business, and a significant improvement in the blended average selling price.
In its latest AI revenue growth forecast, Taiwan Semiconductor Manufacturing has raised its compound annual growth rate guidance for AI revenue from the mid-40% range to the mid-to-high 50% range for the period 2024 to 2029. Concurrently, JPMorgan anticipates capital expenditure could surpass $60 billion in 2027 and approach $70 billion in 2028.
Capital expenditure is experiencing a significant upswing, while the capacity ramp-up cycle is lengthening. JPMorgan believes the company's capital expenditure is entering a new upward inflection point. The guidance of $52 to $56 billion for 2026 is substantially higher than previous annual levels, and the company has explicitly stated that capital expenditure over the next three years will be "significantly higher" than in the past three years. The firm estimates that capacity growth will reaccelerate from the previous 4% to 5% range to a high-single-digit or even approximately 10% level.
The expansion pipeline spans multiple technology nodes and geographies:
N3 node capacity includes Fab 18 Phase 9 in Tainan, Taiwan; Arizona Phase 2; and Japan Phase 2. N2 node capacity is primarily focused on Kaohsiung Phases 1 to 5, with potential expansion in Tainan Fab 18 Phases 10 to 12. A14/A10 node capacity corresponds to Kaohsiung Phases 6 to 8 and the Taichung facility in Taiwan. The company has also planned a new eighth-phase park in Tainan, Taiwan, dedicated to the A10 node and future process technologies.
Notably, the timeline from capital expenditure to actual productive capacity output is extending. JPMorgan points out that current spending for the most advanced nodes might not translate into effective capacity until 2028 at the earliest. This is due to the lower number of wafers produced per unit of cleanroom area for N2 compared to N3, alongside longer construction cycles.
Competitive barriers continue to rise, and the risk of market share loss appears limited. Regarding market concerns that Taiwan Semiconductor Manufacturing might cede market space to competitors due to a conservative expansion pace, JPMorgan's assessment is that overall market share risk is limited.
The analysis indicates that a chip design cycle requires at least two to three years, with an additional one to two years needed for volume production ramp-up at a specific foundry, resulting in a total switching cycle of three to five years and extremely high switching costs.
From a technological competitiveness perspective, the firm estimates that Intel's 18A process currently has comprehensive performance roughly equivalent to Taiwan Semiconductor Manufacturing's N3E, while Samsung's 2nm process is generally comparable to Taiwan Semiconductor Manufacturing's 3nm, still lagging by about one generation. Taiwan Semiconductor Manufacturing's N2 is already in volume production, while the PDK v1.0 for Intel's 14A is not expected until late 2026 at the earliest, suggesting Taiwan Semiconductor Manufacturing maintains an approximate two-year lead in advanced process technology.
JPMorgan acknowledges that collaborations such as Samsung with Tesla and Intel with Cloud Service Providers will continue to attract market attention due to ongoing tightness in advanced process capacity. However, the firm believes the actual impact of these developments on Taiwan Semiconductor Manufacturing's market share is likely to be limited.
Packaging strategy is shifting, with an increasing proportion of outsourcing. Regarding the positioning of advanced packaging, JPMorgan views it as an "enabler" to drive sales of front-end wafers for Taiwan Semiconductor Manufacturing, rather than an independent profit growth engine. This positioning is expected to provide greater flexibility in outsourcing strategy.
Specifically, the On-Substrate process within CoWoS is anticipated to be fully subcontracted to ASE. Chip-on-Wafer orders are also gradually migrating to Outsourced Semiconductor Assembly and Test providers. JPMorgan also notes that advanced packaging does not serve as a springboard for competitors like Intel to enter the front-end foundry business.
Looking ahead, Taiwan Semiconductor Manufacturing's strategic focus is expected to shift towards Chip-on-Package-on-Substrate and 3D-System-on-Integrated-Chips. With NVIDIA potentially introducing 3D stacking in its Feynman architecture and several ASIC customers migrating to N2-based 3D-SoIC, the expansion of 3D-SoIC capacity is predicted to be a key focus in the next phase.
Constrained by land and cleanroom resources, priority between advanced packaging and advanced process capacity will tilt towards the latter. This is expected to further increase the outsourcing ratio to OSAT partners over the next two to three years.
What is the potential impact of Tesla's TeraFab? Following Elon Musk's recent announcement of the TeraFab plan, which aims to establish a US-based AI chip production system with an annual capacity of 1 terawatt, encompassing logic, memory, and advanced packaging, JPMorgan assesses the probability of a material impact on Taiwan Semiconductor Manufacturing as currently low.
The firm outlines three major obstacles:
First, advanced process technology is highly concentrated, currently possessed only by Taiwan Semiconductor Manufacturing, Intel, and Samsung with production-proven capabilities, while IBM offers only laboratory-level process roadmaps. Second, progressing from a process technology to volume production requires extensive engineering积累, involving all segments of the supply chain such as equipment, EDA tools, materials, and chemicals, with yield penalties possible at each of the hundreds of manufacturing steps. Third, a wafer fab with a capacity of 100,000 wafers per month for the N2 node would require an investment of $50 to $60 billion at current costs, alongside continuous R&D investment to maintain technological leadership across process generations.
JPMorgan notes that technological innovations in semiconductors typically take 15 to 20 years to move from laboratory to volume production. The ability to significantly compress this cycle is a key variable. While acknowledging Musk's past successful execution records, the firm believes disrupting the current landscape might require a genuine breakthrough at the physics level.
Capacity node planning and EUV procurement. Regarding specific capacity figures, JPMorgan estimates N3 capacity could reach 165,000 to 170,000 wafers per month by year-end, higher than the previous baseline forecast of about 150,000 wafers per month. This is primarily due to cross-fab utilization of N7 and 28nm capacity from Fab 15 and the earlier introduction of Fab 18 Phase 9.
Looking ahead to 2028, with the full ramp-up of Fab 18 Phase 9, the volume production of Arizona Phase 2 in the second half of 2027, plus Japan Phase 2 and new fab areas, total N3 capacity is expected to exceed 200,000 wafers per month.
For N2, capacity is projected to reach approximately 100,000 wafers per month by the end of 2026, with potential expansion to 200,000 to 240,000 wafers per month over the following three years. Kaohsiung Phases 1 to 5 and Arizona Phase 3 will be the main sources of this increase.
In terms of EUV equipment procurement, JPMorgan expects Taiwan Semiconductor Manufacturing to purchase 29 to 31 units in 2026, up from 21 to 23 units in 2025. Crucially, High-NA EUV will not be used for the N2, A16, or A14 nodes and is anticipated to be introduced earliest for the A10 process node.
Gross margin outlook and supply chain risks. JPMorgan forecasts that Taiwan Semiconductor Manufacturing's gross margin could reach the high-60% to 70% range in the first half of 2026. This is supported by strong demand for advanced processes, an increasing proportion of expedited orders, a favorable NT dollar exchange rate, and the ongoing conversion of idle N7 and 28nm capacity to more advanced uses. The growth rate of depreciation expenses is also expected to be lower than revenue growth.
On the risk side, approximately 48% of Taiwan's electricity generation relies on liquefied natural gas, with about 33% of LNG imports coming from Qatar. Local storage capacity is limited to only about 11 to 15 days.
Disruptions in the Middle East pose a risk of rising energy costs, which represent the primary pressure on gross margins for the second half of 2026, with peak risk concentrated during the summer electricity demand season in August and September. JPMorgan believes that, given the strategic importance of the semiconductor industry, the probability of actual production disruption is low, as Taiwan is expected to prioritize power supply for industrial use.
Regarding potential shortages of specialty gases like helium, JPMorgan's research indicates that Taiwan Semiconductor Manufacturing currently maintains over one month of inventory and is actively procuring from alternative sources, albeit at a cost premium of 2 to 4 times. The company is also enhancing gas recycling rates, and is expected to navigate through the shortage pressure safely.
Blended average selling price is expected to continue its upward trend. Regarding pricing, JPMorgan views recent market reports of price increases as a reiteration of the already negotiated 6% to 10% price hikes for leading-edge processes effective in 2026, rather than representing a new round of comprehensive increases.
Nevertheless, the blended average selling price continues to rise. Factors such as the increasing proportion of expedited orders, HPC clients becoming the main driver of N3 demand, and more customers opting for multi-year price agreements are collectively expected to drive Taiwan Semiconductor Manufacturing's blended average price up by approximately 20% in 2026.
Regarding co-packaged optics, JPMorgan believes the direct revenue contribution to Taiwan Semiconductor Manufacturing will be quite limited, as the cost of related building blocks is significantly lower than the average selling price of advanced process wafers. OSAT partners and the test ecosystem are expected to be the larger beneficiaries if CPO volumes increase.
JPMorgan bases its 12-month target price of NT$2,250 for December 2026 on a forward price-to-earnings ratio of approximately 20 times. This valuation multiple is above the stock's five-year historical average, reflecting the firm's positive view on the sustainability of AI-driven fundamental growth.
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